Building a CPU from the ground up Part 6 - Memory

Registers
These are simply made from 4 DFlipflops. There is a tri-state buffer added to the input and one to the output to allow the register to be set into either a read or a write mode.

Memory is then built up as follows.

4 BIT Memory
4 of the 1 bit DFlipFlops are strung together to make a 4 bit memory module. I will add an enable line to allow the module to “remember” data for longer than one clock cycle. When the enable line is set to 0 the outputs do not change. When the enable line is set to 1 the output will change to the current data on the next high clock.

16 x 4 BIT Memory
16 of the 4 BIT Memory modules are then strung together to make a memory module capable of being addressed by a 4 BIT address. 4 BITs = 16 memory locations, each of them 4 BITs in size. The input has a 1:16 demux to select which of 16 memory locations to use and the output has a 16:1 mux to select which of the memory locations to read.

RAM
My 16x4BIT memory module essentially copies the circuitverse RAM module or at least the features of it I use. I’ve added a few extras to my RAM module. A read enable control to the to allow control over whether or not it writes to the the buffer. A clock input to it so writes and reads only occur on positive clock cycles. Also given the RAM both reads and writes to the same buffet I’ve added some additional Dflipflops on the inputs to prevent any conflicts of signals.

ROM
The ROM is similar to the RAM. It differs in that you can easily change what it contains by typing in HEX codes. It also doesn’t need the input flipflops as it doesn’t read and write from the same places. The ROM will read from the Programme Counter and write to some specific registers.

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